Engineer - Emulation Debug

Position Summary

Samsung is a world leader in Memory, LCD and System LSI technologies. We are currently looking for exceptional software and hardware talent to join our Samsung Austin R & D Center (SARC) in Austin, TX and our Advanced Computing Lab (ACL) in San Jose, CA. SARC was established in Austin, TX in 2010 to be one of Samsung’s strategic investments in high performance low power ARM based device technology. Presently our GPU design teams, located in Austin (SARC) and San Jose (ACL), are developing a GPU that will be deployed in Samsung mobile products.

Role and Responsibilities

As an Emulation Debug Engineer, you will work as part of a GPU IP design team. This is a mid to senior level position where the candidate will be in an individual contributor role, tasked with driving the function debug efforts across various graphics sub-blocks.

Key responsibilities include:

  • Understand the cycle flows in Graphics subsystem
  • Bring up graphics features on emulation platform & perform day-to-day debug
  • Build corruption detection and hang detection mechanism

Skills and Qualifications

Minimum requirements:

  • •BSEE, Computer Engineer or comparable and  5 + years of experience with  Emulators (Zebu, Palladium, veloce), Verilog and System Verilog
  • •3 years of experience in functional debug on Graphics subsystems
  • •1-3 years Experience on Emulation platforms
  • •3 years + experience with scripting languages (Python), experience in Python Pandas Data frames is added plus

Preferred candidate will possess the following:

  • Good written and verbal communication skills
  • Experience in Zebu, Verilog coding and C coding on Emulators
  • Background in Graphics debug
  • Scripting proficiency

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Location
United States
Skills
  • Python
  • R
  • C